Articles
What’s New with UVM and UVM Checking?
The level of checking that Verissimo provides helps IEEE create a better reference implementation library and helps users switching versions. Verification engineers clearly see the value in being able to check whether existing testbenches will work with the latest revision to the standard.
11 Myths About Integrated Development Environments
IDEs were introduced to improve the efficiency and accuracy of writing and maintaining code, providing easier file navigation, hierarchical views of the project codebase, etc. However, myths have arisen about IDEs, and this article looks to clear the air.
Why Would Anyone Perform Non-Standard Language Checks?
Relying on non-standard constructs can trap users with one vendor and make it expensive to switch to another.
Does IDE Stand for Integrated Design Environment?
Examples of design visualization include the connections of a signal or instance, or connections between instances
e language users deserve IDE support too
e has unique capabilities that keep it in active use, and IDE features for other languages are also available for e
Extract benefit from the automated refactoring of VHDL code
VHDL users benefit greatly from DVT Eclipse IDE, with its deep insight into the language and its easy-to-use GUI
Don’t You Forget About “e”
DVT Eclipse IDE compiles e code on the fly as it is typed in, reporting a wide range of syntactic and semantic errors
How IDEs Enable the ‘shift left’ for VHDL
Checking VHDL coding errors on the fly and offering quick fix proposals is a shift left in the development process
The Polyglot World of Hardware Design and Verification
AMIQ EDA provides a consistent level of capabilities for all design and verification languages, erasing boundaries
VHDL Users Also Deserve Efficient Design and Verification
Moving, tracing, and searching across multiple VHDL files helps when debugging errors or trying to understand a design