Articles
A Helping Hand for Design and Verification
Design and verification engineers need all the help they can get from hyperlinks, auto-complete, and task-specific wizards
Why Hyperlinks are Essential for HDL Debugging
Design and verification engineers need a modern IDE that performs sophisticated analysis and navigates in a flexible GUI
With Great Power Comes Great Visuality
Since DVT Eclipse IDE supports both UPF/IEEE 1801 and CPF, SoC teams can choose their preferred power intent format
Renaming and Refactoring in HDL Code
The GUI shows all relevant files, the user previews the proposed changes, and renaming happens instantly and accurately
Circuit Archaeology with the Help of Amiq
DVT Eclipse IDE can produce excellent block diagrams, flow diagrams, and schematics with the minimum of fuss
I Thought that Lint Was a Solved Problem
All its users also have access to lots of other tools, so clearly Verissimo adds unique value to design and verification
Easing Your Way into Portable Stimulus
AMIQ supports PSS on-the-fly compliance checking, autocomplete, intelligent code-formatting, navigation, and search
Perspec Portable Stimulus Hands-On Workshop at DAC 2018
Thanks to AMIQ for supplying DVT Eclipse IDE for contestants to edit PSS; it was a great demonstration of interoperability
AMIQ and Cadence demonstrate Accellera PSS v1.0 interoperability
With PSS support in DVT Eclipse IDE, verification engineers develop robust portable stimulus descriptions in much less time
CEO Interview: Cristian Amitroaie of AMIQ EDA
DVT Eclipse IDE has moved into new domains such as power intent verification and portable stimulus specification