Specador Documentation Generator User Guide
Rev. 23.1.12, 23 May 2023
| <!-- The XML file header, required. --> <!-- GENERAL OPTIONS --> <!-- Location where documentation will be generated. Relative paths are solved as relative to the current directory. --> <!-- Delete all files in the destination directory before generating documentation. --> <!-- When running in GUI mode, choose whether to open or not the generated documentation in browser. --> <!-- Export source code for documented elements. --> <!-- Title --> <!-- The content of the overview file will be embedded in the first page. <!-- Beautify comments: start sentences with capital letter, append dot after sentences, bfm -> BFM, dut -> DUT etc. --> <!-- Syntax for comments formatting: auto, naturaldocs, javadoc or none. --> <!-- Add a custom CSS file to the documentation. --> <!-- Add a custom JavaScript file to the documentation. --> <!-- The user defined navigation menu (HTML or XML format) will be embedded in the main menu. <!-- Add "Created by <username> ..." watermark. --> <!-- Generate documentation only for public API. --> <!-- API matching the below filters with not be included in the generated documentation. Default: none. --> <!-- You can specify one or more file or directory paths. --> <!-- Generate UML inheritance diagram for each class, struct or unit. --> <!-- Generate UML inheritance diagram for all class, struct or unit in each package. --> <!-- Generate UML collaboration diagram for each class, struct or unit. --> <!-- Generate UML direct associations diagram for each class, struct or unit. --> <!-- Use orthogonal edge routing for class diagrams. --> <!-- Generate design block diagram for each module, entity. --> <!-- Generate design flow diagram for each module, entity. --> <!-- Generate design schematic diagram for each module, entity. --> <!-- Generate finite-state machine diagrams for all state variables found in the module, entity. --> !-- Direction for the FSM Diagrams: Up, Down, Left or Right --> <!-- Placement strategy for FSM Diagrams: Brandes-Koepf or Network Simplex --> <!-- Enforce the in/out connections between states: None, All States or All States Except Initial --> <!-- Position for initial state in FSM Diagram: Free, First or Last --> <!-- Show default state in FSM Diagrams --> <!-- Show loopback edges in FSM Diagrams --> <!-- Generate bitfield diagrams for all UVM registers. --> <!-- CROSS-LINK WITH PRE-GENERATED DOCUMENTATION --> <!-- Link to the elements for which documentation is already generated in the directories specified below, instead of re-generating their HTML pages. --> <!-- Link DPI-C API with Doxygen documentation pages using a Doxygen tag file. --> <!-- Add entries in the main menu with links to the external documentation. --> <!-- Order ports alphabetically. --> <!-- SYSTEMVERILOG SPECIFIC --> <!-- Generate modules documentation. --> <!-- Generate interfaces documentation. --> <!-- Generate programs documentation. --> <!-- Generate macros documentation. --> <!-- Generate ifndef guards documentation. Default: false. --> <!-- Generate control defines documentation. Default: true. --> <!-- Generate elements in the global scope (typedefs, classes, functions, tasks etc.). --> <!-- Generate packages documentation. --> <!-- Generate specific package documentation. --> <!-- Generate assertions documentation. --> <!-- Generate covergroups documentation. --> <!-- Generate interface signals documentation. --> <!-- Expand `include directives in the body of a module. --> <!-- VHDL SPECIFIC --> <!-- Generate libraries documentation. --> <!-- Generate specific library documentation. --> <!-- E LANGUAGE SPECIFIC --> <!-- Generate macro documentation. --> <!-- Generate packages documentation. --> <!-- Generate specific package documentation. --> </spechtml> |