"New features in DVT Eclipse IDE: schematics, trace diagrams, quick fixes and more."
AMIQ EDA unveils new Verilog and VHDL design-oriented diagrams that enable both design and verification engineers to easily visualize, explore, and understand RTL code.
At a recent EDA event, Semi-IP Systems talked with Cristian Amitroaie, the CEO of AMIQ, about the good and bad side of developing software from code that is copied from another program.
Watch the second part of the interview that deals with Detecting Software Code Copy-Paste.
Amiq DVT Debugger Add-On is an add-on to VCS/Questa/Incisive to let an engineer NOT have to continuously switch between his editor and the "e"/SystemVerilog/VHDL simulator.
AMIQ EDA announces new rules for duplicate code detection in its Verissimo SystemVerilog Testbench Linter to help design and verification engineers improve code quality and reduce maintenance costs.
"How the new debugger integration in combination with the powerful code navigation and inspection features of the DVT IDE, eliminates the need to switch continuously between a code editor and simulator and enable users to debug their code more efficiently."
AMIQ EDA Releases the DVT Debugger Add-On Module for the e language, SystemVerilog, Verilog, and VHDL
AMIQ EDA announced the release of the DVT Debugger Add-On Module for the e language, SystemVerilog, Verilog, and VHDL, an extension to the DVT IDE that allows design and verification engineers perform debugging from the same place where they develop their code, in order to simplify and speed up debugging.