"The Verissimo SystemVerilog Testbench Linter is a a coding guideline and verification methodology compliance checker that enables engineers to perform an effective audit of their testbenches and helps them meet the requirements of today's complex functional verification."
Exhibitor at EDSFair Japan
Based on the Eclipse open source platform, DVT is aimed at newcomers and experts working on system design and verification. "I had experience of IDEs in the software development world," Cristian Amitroaie explained. "We urgently needed one in our consulting business and would have bought one if it existed!". Instead, Amiq developed its own IDE and, when customers saw the productivity gains in verification, they wanted it too.
"The complexity of SoC Verification faced by customers today requires more stringent adherence to the UVM reuse verification methodology in order to ensure more seamless IP integration. Capabilities like AMIQ's DVT UVM Compliance Checker are essential for customers to check that their verification IP is consistent with the UVM in order to accelerate time to SoC and silicon realization.", said Michael Stellfox.