The Cadence® Connections® Verification Program brings together a worldwide network of services, training, and IP development experts that support Cadence verification solutions. Based on years of experience in re-usable verification intellectual property (VIP), the program members help you accelerate the adoption of new technologies and improve the productivity of your verification teams.
Universal Verification Methodology (UVM) is a standard to enable guaranteed development and reuse of verification environments and verification IP (VIP) throughout the electronics industry. Accellera provides both an API standard for UVM and a reference implementation. That reference implementation is a class library defined using the syntax and semantics of SystemVerilog (IEEE 1800).
Thank you all!
The DVT Eclipse IDE is a fantastic tool and you'd be nuts not to want it. Thanks AMIQ for helping to bring SystemVerilog development into the 21st century.
My team is definitely using DVT Eclipse and we LOVE it!!! Keep up the great work!!
Nordic Semiconductor has been using the DVT Eclipse IDE since 2008 and it has improved our SystemVerilog design experience significantly. The support is excellent.
Many of us would actually struggle to maintain our levels of productivity without the DVT Eclipse IDE. It is our fundamental tool for verification development.
The DVT Eclipse IDE makes you efficient and less error prone. It keeps track of every step you make and alerts you instantly. This way your work is always clean. No need for grep, find, and other such operations. DVT provides hyperlinks, auto-complete, references, and much more smarter options to give you better and relevant results. And this is just the tip of the iceberg. Even after 10 years of working with DVT I still find new features which make my work (and life) easier.
Just the speed that I can run through code, develop/debug is worth tremendously. I'm pretty sure that the efficiency gained through using the DVT Eclipse IDE, is the greatest contributor to me being seen as a valuable verification engineer. I'd simply be lost in a jungle of code without it.
I've used IDE's for software development for over 20 years. When I started doing design verification, the first thing I did was search for an IDE for SystemVerilog, and I quickly came upon the DVT Eclipse IDE. It has become an indispensable tool for creating and navigating complex testbench environments. I rarely use anything else to view and edit SystemVerilog code anymore. Through the entire time I've been a user of DVT, AMIQ's first-class level of support has been above and beyond my expectations. Thanks AMIQ!
It’s great to see how you guys are committed to make the product better, it’s always been a pleasure to work with AMIQ team. The DVT Eclipse IDE is the reason why I am being so much more productive. So a big thanks to AMIQ!
Thanks for supper fast support. And great job in the tool. After using the DVT Eclipse IDE I feel I have been living in stone ages using gvim!
I had setup several teams in my division with DVT Eclipse IDE in their design models. I think it is a great product and is pretty much a necessity for verification engineers.