DVT IDE for VS Code VHDL User Guide
Rev. 24.1.5, 13 March 2024

DVT IDE for VS Code VHDL User Guide

Table of Contents

1. Installation
1.1. System Requirements
1.2. Install DVT for VS Code from Marketplace
1.3. Install DVT for VS Code from VSIX
1.4. Install DVT for VS Code Using a Pre-Packed Distribution
1.5. Set the License
2. Predefined Projects
3. Build Configurations
3.1. Project Natures
3.2. Non-top files
3.3. default.build
3.4. Auto-config
3.5. Simulator Log-config
3.6. Emulating compiler invocations
3.7. Multiple .build Files
3.8. Compatibility Modes
3.8.1. Default DVT Compatibility Mode
3.8.2. gcc Compatibility Mode
3.8.3. ius.irun Compatibility Mode
3.8.4. ius.perspec Compatibility Mode
3.8.5. questa.vcom Compatibility Mode
3.8.6. questa.vlog Compatibility Mode
3.8.7. questa.qrun Compatibility Mode
3.8.8. vcs.vhdlan Compatibility Mode
3.8.9. vcs.vlogan Compatibility Mode
3.8.10. xcelium.xrun Compatibility Mode
3.9. Paths
3.10. Strings
3.11. Comments
3.12. Environment Variables
3.13. Including Other Argument Files
3.14. Build Persistence
3.15. All Build Directives
3.16. SystemVerilog OVM or UVM Library Compilation
3.17. Xilinx Libraries Compilation
3.18. Intel(Altera) Quartus Libraries Compilation
3.19. Questa Libraries Compilation
3.20. Use of External Programs
4. Compile Checks
4.1. Compile Waivers
4.2. Semantic Checks
4.3. Non Standard Checks
5. Quick Fix Proposals
6. Content Assist (Autocomplete)
6.1. Content assist for CamelCase and Underscore
6.2. Code Templates
6.3. Component Automatic Instantiation
6.4. Generate Case Statement Using Autocomplete
7. Hyperlinks
8. Show Usages
9. Show Readers or Writers
10. Show Instances
11. Peek Exploration
12. Refactoring
13. Code Factory
14. Code Formatting
14.1. Capitalization
14.2. Whitespace
14.3. Indentation
14.4. Vertical Alignment
14.5. Line Wrapping
14.6. Disable Format for Code Sections
14.7. Preferences Keys
15. Breadcrumb Navigation Bar
15.1. Design Breadcrumb
15.2. Verification Breadcrumb
15.3. Scope Breadcrumb
16. Diagrams
16.1. Design Diagrams
16.1.1. Schematic Diagrams
16.1.2. Flow Diagrams
16.1.3. Block Diagrams
16.1.4. Finite-State Machine Diagrams
16.1.5. Design Diagram Actions
16.1.6. Design Diagram Filters
16.2. Bit Field Diagrams
16.3. WaveDrom Timing Diagrams
16.4. Common Diagram Actions
16.5. Common Diagram Toolbar
17. Syntax Coloring
18. Inactive Generates Code Highlight
19. Database Out of Sync Notification
20. Tooltips
20.1. Comments Formatting
20.1.1. Javadoc
20.1.2. Natural Docs
21. Workspace Symbols
22. Views
22.1. Problems View
22.2. Outline View
22.3. Compiled Files View
22.4. Compile Order View
22.4.1. Build Config Hierarchy
22.5. Design Hierarchy View
22.6. Diagnostics View
23. Quick Search in Views
23.1. CamelCase
23.2. Simple Regex
23.3. Hierarchical Search
23.4. Search for Members
23.5. Search Port in Design Hierarchy
24. Content Filters
24.1. Content Filters XML Syntax
24.2. Filtering by Element Type
24.3. Content Filters Examples
24.4. Predefined Content Filters
25. External Tools Integration
26. Scripts
26.1. dvt_code.sh
26.1.1. dvt_code.sh Syntax
26.1.2. dvt_code.sh Examples
26.2. dvt_ls.sh
26.2.1. dvt_ls.sh Syntax
26.2.2. dvt_ls.sh Examples
27. Custom Scripts
28. SCM Checkout Hook
29. Memory Monitor
30. Application Notes
30.1. Flow Integration
30.2. Environment Variables
30.3. Design Elaboration
30.3.1. Top candidates
30.3.2. Parameter values
30.3.3. Unelaborated Design
30.3.4. Debugging
30.3.5. Performance
30.4. FPGA Support
30.4.1. Intel(Altera) Quartus
30.4.2. Xilinx ISE/Vivado
30.5. Output and logging
31. Handy VS Code Documentation Pointers
32. What is New?
33. How to Report an Issue?
34. Legal Notices
35. Third Party Licenses
36. Q & A
36.1. Can I deactivate DVT support for a workspace even though one of my workspace folders contains a .dvt directory?