Verissimo SystemVerilog Testbench Linter User Guide
Rev. 23.1.8, 29 March 2023
Using the Verissimo ExportDesignHierarchy rule you can print or export the design hierarchy to a file.
By default, the entire elaborated design hierarchy is exported, including all specified design tops. However you may choose to export only a subset of the design hierarchy using the designPath parameter. It can be either an instance path (such as top1.subinst1.subinst2), a top name (like top1) or a module name. If a module name is specified, then any design hierarchy instance of that module will be used.
Use the dumpTo parameter to control the rule output: export to file (value="file"), print to Console View (value="console"), or both (value="console, file").
When dumping the design hierarchy to a file, you can specify the file path by setting the filePath parameter. If this parameter is not specified, then the file will be generated in the project folder or the working directory and the file name will be: dh_<timestamp>.txt
It is also possible to specify if the exported paths should be absolute or relative to the top by setting the dumpAbsoluteDesignPaths parameter.
A ruleset file containing just the ExportDesignHierarchy rule would look like this:
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
When running Verissimo with such a ruleset in DVT the Verissimo GUI report will look like this:
And the Console View will contain the following: