Module ip_gate_clock_g

ip_gate_clock_g u_ip_gate_clock_g ( .pi_clock(pi_clock), .pi_enable(pi_enable), .pi_test_en(pi_test_en), .pi_bistmode_en(pi_bistmode_en), .po_clock(po_clock) );

Block Diagram of ip_gate_clock_g

Ports

Name	Direction	Type	Description
pi_clock	input	wire logic	Input free running clock
pi_enable	input	wire logic	Enable output clock
pi_test_en	input	wire logic	Test enable
pi_bistmode_en	input	wire logic
po_clock	output	wire logic	Output free running clock

Instances

• ip_emac_topip_emac_top

  • host_clk_mngip_host_clk_mng_g

    • host_free_clock

    • host_gate_clock_1

    • host_gate_clock_2

    • host_gate_clock_3

    • host_gate_clock_4

    • host_gate_clock_5

  • mac_topip_mac_top_g

    • mac_clk_mngip_mac_clk_mng_g

      • gtx_clock_out

      • host_free_clock

      • host_gate_clock_1

      • mdio_free_clock

      • rx_free_clock

      • rx_gate_clock_1

      • rx_gate_clock_2

      • rx_gate_clock_3

      • tx_free_clock

      • tx_gate_clock_1

      • tx_gate_clock_2

      • tx_gate_clock_3

      • tx_gate_clock_4

Submodules

• ip_gate_clock_g

  • gate_clock : gate_clock_cell_g

  • output_cts : cts_buffer

Reset

Schematic Diagram of ip_gate_clock_g

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