Module ip_mac_fc_gen_g
Overview
Name |
Direction |
Type |
Description |
---|---|---|---|
pi_reset |
input |
wire logic |
Global Hardware/Software reset (active low) |
pi_g_clock |
input |
wire logic |
Transmit GMII/MII 125/25/2.5 MHz clock (from Clock Manager, gated clock) |
pi_f_clock |
input |
wire logic |
Transmit GMII/MII 125/25/2.5 MHz clock (from Clock Manager, free clock) |
po_en_clock |
output |
var reg |
Transmit GMII/MII 125/25/2.5 MHz clock gated clock enable |
pi_fc_addr |
input |
wire logic[2:0] |
Command interface Next FC word request (from TX state) |
pi_fc_enable |
input |
wire logic |
Enable flow control |
pi_xon_value |
input |
wire logic[15:0] |
from configuration XOFF flow control pause value |
pi_xoff_value |
input |
wire logic[15:0] |
from configuration XON flow control pause value |
pi_fc_xon_tgl |
input |
wire logic |
Request insert FC XON/XOFF (each time the following input toggle) from RX EMAC insert XOFF flow control information |
pi_fc_xoff_tgl |
input |
wire logic |
from RX EMAC insert XON flow control information |
pi_half_duplex |
input |
wire logic |
Half duplex flow control |
pi_col_limit |
input |
wire logic[4:0] |
Half duplex back pressure collision limit |
pi_gmii_col |
input |
wire logic |
Collision indication used to count the collisions during HD FC enable |
po_hd_fc_en |
output |
var reg |
Half Duplex flow control enable |
po_fc_ready |
output |
var reg |
FC frame interface Request to insert a new FC frame |
po_fc_eop |
output |
var reg |
Note: When asserted has the meaning of ready and start of frame Flow control frame end of frame |
po_fc_sop |
output |
var reg |
Flow control frame start of frame |
po_fc_data |
output |
var reg[31:0] |
Flow control frame data |
Instances
- ip_emac_topip_emac_top
- mac_topip_mac_top_g
- mac_tx_topip_mac_tx_top_g
tx_fc_gen
The flow control (PAUSE) operation is used to inhibit transmission of data frames for a specified period of time. A MAC Control client wishing to inhibit transmission of data frames from another station on the network generates a MAC CONTROL frame specifying: - The globally assigned 48-bit multicast destination address 01-80-C2-00-00-01H - The PAUSE opcode 00-01H - The CONTROL frame type 88-08H - A request Pause Value (16-bit value) indicating the length of time for which it wishes to inhibit data frame transmission.
The PAUSE operation cannot be used to inhibit transmission of MAC Control frames. PAUSE frames shall only be sent by MAC's configured to the full duplex mode of operation. The globally assigned 48-bit multicast address 01-80-C2-00-00-01 has been reserved for use in MAC Control PAUSE frames for inhibiting transmission of data frames from a MAC in a full duplex mode.