Module ip_mac_hostif_arb
Name |
Direction |
Type |
Description |
---|---|---|---|
pi_reset |
input |
wire logic |
|
pi_clock |
input |
wire logic |
host pi_clock |
pi_tx_frame_transmit |
input |
wire logic |
from pi_mac_hostif_tx |
pi_regs_csr0_bar |
input |
wire logic |
from banks regs |
pi_rx_req |
input |
wire logic |
|
pi_tx_req |
input |
wire logic |
|
pi_rx_ds_req |
input |
wire logic |
|
pi_tx_ds_req |
input |
wire logic |
|
pi_tx_upd_req |
input |
wire logic |
|
pi_rx_mcmd |
input |
wire logic[1:0] |
|
pi_rx_maddr |
input |
wire logic[31:0] |
|
pi_rx_mdata |
input |
wire logic[31:0] |
|
pi_rx_mlast |
input |
wire logic |
|
pi_tx_mcmd |
input |
wire logic[1:0] |
|
pi_tx_maddr |
input |
wire logic[31:0] |
|
pi_tx_mlast |
input |
wire logic |
pi_tx_mdata, |
pi_rx_ds_mcmd |
input |
wire logic[1:0] |
|
pi_rx_ds_maddr |
input |
wire logic[31:0] |
|
pi_rx_ds_mlast |
input |
wire logic |
|
pi_tx_ds_mcmd |
input |
wire logic[1:0] |
|
pi_tx_ds_maddr |
input |
wire logic[31:0] |
|
pi_tx_ds_mlast |
input |
wire logic |
|
pi_tx_upd_mcmd |
input |
wire logic[1:0] |
|
pi_tx_upd_maddr |
input |
wire logic[31:0] |
|
pi_tx_upd_mdata |
input |
wire logic[31:0] |
|
pi_tx_upd_mlast |
input |
wire logic |
|
po_host_mcmd |
output |
var reg[1:0] |
|
po_host_maddr |
output |
var reg[31:0] |
|
po_host_mdata |
output |
var reg[31:0] |
|
po_host_mlast |
output |
var reg |
|
po_rx_allowed |
output |
var reg |
|
po_rx_ds_allowed |
output |
var reg |
|
po_tx_allowed |
output |
var reg |
|
po_tx_ds_allowed |
output |
var reg |
|
po_tx_upd_allowed |
output |
var reg |
Always Blocks
- always @ ( arb_state or po_rx_allowed or po_tx_allowed or po_rx_ds_allowed or po_tx_ds_allowed or po_tx_upd_allowed )
arbiter next state calculation
# |
Current State |
Next State |
Condition |
---|---|---|---|
1 |
`ARB_IDLE |
`ARB_S0 |
[!(~ pi_reset)] |
Instances
- ip_emac_topip_emac_top
- host_ifip_mac_hostif_top
hostif_arb
Global interface global asynchronous pi_reset