Module ip_mac_big_endian
Overview
Name |
Direction |
Type |
Description |
---|---|---|---|
pi_little |
input |
wire logic |
Configuration Little endian |
pi_data |
input |
wire logic[31:0] |
Input little/big endian 32-bit word Input 32-bit data |
po_data |
output |
wire logic[31:0] |
Output little endian 32-bit word Output 32-bit translated data |
Instances
- ip_emac_topip_emac_top
- mac_topip_mac_top_g
- mac_rx_topip_mac_rx_top_g
rx_endian
- mac_tx_topip_mac_tx_top_g
tx_endian
×
Data should be translated to little endian format. The following module is a combinatorial module and is responsible to translate a 32-bit wide data bus (4-byte word) big endian format into a little endian organized word. When the input data is little endian organized the data is passed trough this block and remain unchanged.