DVT SystemVerilog IDE User Guide
Rev. 21.1.24, 8 June 2021
An error is triggered when connecting a non-existing port in a module instantiation.
Place the editor cursor on the error's line and press Ctrl + 1, select Add port ... from the list of quick fix proposals and press Enter.
Tip: If the module is instantiated multiple time across the project, the Refactor Add Port Wizard is opened. See here.
Tip: You may change the port direction. Press Enter when done.