DVT SystemVerilog IDE User Guide
Rev. 19.1.28, 14 August 2019

33.5 Makefile Example

If you plan to integrate DVT in a flow which uses Make, you can find an example Makefile inside the uvm-1.1d_ubus predefined project:

   cd $DVT_HOME/predefined_projects/uvm-1.1d_ubus/examples/

   # default target prints the usage
   make -f Makefile.dvt

   # Target dvt_gen creates the project directory
   # and generates the project configuration files
   make -f Makefile.dvt dvt_gen

   # Target dvt calls dvt_gen, starts DVT and creates the project
   make -f Makefile.dvt dvt # target dvt con