DVT SystemVerilog IDE User Guide
Rev. 19.1.21, 21 June 2019

14.1 Override Annotation

An Override Annotation indicates that a function/task overrides a parent class implementation.

Override annotations are triangles on the vertical ruler to the left of the editor, next to the function definition:

A green triangle indicates an overridden function
A yellow triangle indicates a shadowed function that overrides a non-virtual function from a parent.
A white triangle indicates a predefined function

Hover an override annotation to see the overridden parent.

Click on an override annotation to jump to the parent function that is overridden.