DVT SystemVerilog IDE User Guide
Rev. 20.1.23, 9 July 2020
Simulator switches for SystemVerilog and VHDL
In order for DVT to communicate with the simulator, you need to pass the simulator a set of switches. The table below details the required switches per simulator:
NOTE: In general, simulation runs slower when debugging is enabled. This has nothing to do with the DVT-Simulator integration. The extent of this effect is simulator-specific.
NOTE: The -qwavedb flag of vsim is known to interfere with the proper display of local and class variable in the Variables View.
The dvt_sn_debug Library for e-Language
In order for DVT to communicate with Specman, you need to load or precompile the dvt_sn_debug library into Specman.
The library is typically located in the $DVT_HOME/libs folder, which you should add to your $SPECMAN_PATH
The dvt_sn_debug library implements the communication between DVT and Specman in debug mode. It doesn't add any simulation overload.
Communication between DVT and the simulator is done: