Class uvm_mem_single_access_seq

• uvm_pkg :: uvm_void

  • uvm_pkg :: uvm_object

    • uvm_pkg :: uvm_transaction

      • uvm_pkg :: uvm_sequence_item

        • uvm_pkg :: uvm_sequence_base

          • uvm_pkg :: uvm_sequence

            • uvm_pkg :: uvm_reg_sequence

              • uvm_pkg :: uvm_mem_single_access_seq

Reset

Inheritance Diagram of uvm_mem_single_access_seq

Verify the accessibility of a memory by writing through its default address map then reading it via the backdoor, then reversing the process, making sure that the resulting value matches the written value.

If bit-type resource named "NO_REG_TESTS", "NO_MEM_TESTS", or "NO_MEM_ACCESS_TEST" in the "REG::" namespace matches the full name of the memory, the memory is not tested.

uvm_resource_db#(bit)::set({"REG::",regmodel.blk.mem0.get_full_name()},
                           "NO_MEM_TESTS", 1, this);

Memories without an available backdoor cannot be tested.

The DUT should be idle and not modify the memory during this test.

Variables

Name	Type	Description
mem	uvm_mem	The memory to be tested

Constructors

function new ( string name )

Tasks

virtual function body ( )

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