[source]

Class uvm_post_reset_phase

uvm_pkg::uvm_post_reset_phase + type_name : string + exec_task() + get(): uvm_post_reset_phase + get_type_name(): string

Inheritance Diagram of uvm_post_reset_phase

After reset is de-asserted.

uvm_task_phase that calls the uvm_component::post_reset_phase method.

Upon Entry

  • Indicates that the DUT reset signal has been de-asserted.

Typical Uses

  • Components should start behavior appropriate for reset being inactive. For example, components may start to transmit idle transactions

    or interface training and rate negotiation. This behavior typically continues beyond the end of this phase.

Exit Criteria

  • The testbench and the DUT are in a known, active state.
Variables

Name

Type

Description

type_name

string

Functions

static function uvm_post_reset_phase get ( ) [source]

Returns the singleton phase handle

virtual function string get_type_name ( ) [source]

Tasks

virtual function exec_task ( uvm_component comp, uvm_phase phase ) [source]