[source]

Class uvm_port_component_base

uvm_pkg::uvm_port_component_base + build_phase(): void + do_task_phase() + get_connected_to(): void + get_provided_to(): void + is_export(): bit + is_imp(): bit + is_port(): bit uvm_pkg::uvm_port_component <PORT>

Inheritance Diagram of uvm_port_component_base

This class defines an interface for obtaining a port's connectivity lists after or during the end_of_elaboration phase. The sub-class, uvm_port_component #(PORT), implements this interface.

The connectivity lists are returned in the form of handles to objects of this type. This allowing traversal of any port's fan-out and fan-in network through recursive calls to get_connected_to and get_provided_to. Each port's full name and type name can be retrieved using get_full_name and get_type_name methods inherited from uvm_component.

Constructors

function new ( string name, uvm_component parent ) [source]

Functions

virtual function void get_connected_to ( uvm_port_list list ) [source]

For a port or export type, this function fills list with all of the ports, exports and implementations that this port is connected to.

virtual function void get_provided_to ( uvm_port_list list ) [source]

For an implementation or export type, this function fills list with all of the ports, exports and implementations that this port is provides its implementation to.

virtual function bit is_port ( ) [source]

virtual function bit is_export ( ) [source]

virtual function bit is_imp ( ) [source]

These function determine the type of port. The functions are mutually exclusive; one will return 1 and the other two will return 0.

virtual function void build_phase ( uvm_phase phase ) [source]

Turn off auto config by not calling build_phase()

Tasks

virtual function do_task_phase ( uvm_phase phase ) [source]